1. Field of the Invention
The present invention generally relates to a method of forming a touch panel circuit, and more particularly to a method of forming double-sided patterns in the touch panel circuit by sputtering, exposure, developing and etching.
2. Description of the Related Art
Resistive and capacitive touch panels are two common types of touch panel technology. The capacitive touch panel usually includes double-sided patterns in a touch panel circuit. The patterns are manufactured by stacking a number of transparent conductive materials (such as indium tin oxide (ITO)) on two sides of a glass substrate using photolithography technique such as exposure, developing and etching. Specifically, the patterns usually include a top conductive film formed on the top surface of the glass substrate and a bottom conductive film formed on the bottom surface of the glass substrate. A metal circuit layer is also formed on the peripheral edge of the glass substrate. A touch on the capacitive touch panel results in capacitance change between the top conductive film and the bottom conductive film, and the induced current and the corresponding position due to the capacitance change can be detected by the metal circuit layer.
The double-sided patterns of the conventional touch panel circuit are manufactured by firstly vacuum sputtering a top conductive layer and a bottom conductive layer, respectively, on the top surface and the bottom surface of the glass substrate. Subsequently, a top photoresist layer is applied to the top conductive layer, and a protecting layer is applied to the bottom conductive layer. The top photoresist layer is then covered with a patterned photomask, followed by exposing to ultraviolet (UV) and developing the top photoresist layer, thereby exposing regions of the top conductive layer. After etching the exposed regions, the top conductive film is thus formed in the top conductive layer, followed by removing the remaining photoresist on the top conductive film and removing the protecting layer on the bottom conductive layer.
Afterwards, a bottom photoresist layer is applied to the bottom conductive layer, and a protecting layer is applied to the top conductive layer. The bottom photoresist layer is then covered with a patterned photomask, which is aligned according to the top conductive film, which is captured by an imaging device (such as a charge-coupled device (CCD)). The bottom photoresist layer is then exposed to UV and developed, thereby exposing regions of the bottom conductive layer. After etching the exposed regions, the bottom conductive film is thus formed in the bottom conductive layer, followed by removing the remaining photoresist on the bottom conductive film and removing the protecting layer on the top conductive layer.
The conventional manufacturing method described above requires repetitive photolithography processes, including multiple steps of forming and removing the photoresist/protecting layers, and multiple steps of developing and etching. In addition to at least two photolithography processes in the formation of the top and bottom conductive films, a further photolithography process is needed in the formation of the metal circuit layer, thereby altogether consuming substantial time and cost in the manufacturing.
The conventional photolithography technique described above is disclosed, for example, in US Patent Application Nos. 2007/0269936, 2002/0048730, U.S. Pat. No. 6,037,005 and China Patent No. 1549004. However, as no double-sided etching technique has ever been disclosed with respect to opto-electronic devices, a need has thus arisen to propose a novel method for overcoming the disadvantages mentioned above.